In the 80386, i486, and Pentium paged memory architecture, an address in memory created by combining the processes of segment translation and page translation. In the paged-memory scheme, which requires that the microprocessors paging feature be enabled, logical addresses are transformed into physical addresses in two steps: segment translation and page translation. The first step, segment translation, converts a logical to a linear addressan address that refers indirectly to a physical address. After the linear address is obtained, the microprocessors paging hardware converts the linear address to a physical address by specifying a page table (an array of 32-bit page specifiers), a page (a 4-KB unit of contiguous addresses within physical memory) within that table, and an offset within that page. This information collectively refers to a physical address.
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